1. Field of the Invention
The present invention generally relates to a method for reducing short channel effect, and more particularly to a method for forming pocket regions in a metal-oxide-semiconductor transistor.
2. Description of the Prior Art
Referring to FIG. 1, a schematic representation of the structure for a conventional MOS (metal-oxide-semiconductor) transistor with a pocket region formed therein. In FIG. 1, a substrate 100 is provided with a gate oxide layer 122 and a gate electrode 130 formed thereon, and spacers 124 are formed on the sidewalls of the gate oxide layer 122 and the gate electrode 130. Moreover, LDD (Lightly-Doped Drain) regions 115 are formed under the spacers 124, and a channel region 112 is formed between the LDD regions 115. Source/drain regions 117 are formed on the other sides of the LDD regions 115, and an APT (anti-punch-through) region 113 is formed between the source/drain regions. The conductivity type of the source/drain regions 117 is the same as the LDD regions 115, and the conductivity type of the channel region 112 is the same as the APT region 113 which is opposite to the source/drain regions'. When the scale of gate shrinks, the distance between the source and drain is shorter so that the short channel effect takes place. A conventional method for solving this effect is to form pocket regions 116 between the APT region 113 and the source/drain regions 117, in which the conductivity type of the pocket regions 116 is the same as the APT region 113.
For the deep sub-micron device, how to decrease the short channel effect to prevent threshold voltage rolling-off is an important issue. A conventional method is to increase the concentration of the pocket region to generate the reverse short channel effect to increase the threshold voltage. However, the increased concentration of the pocket region will increase the resistant of the LDD regions, and then the Idsat as well as the driving current of the device decrease.